 |
| STUDENTS
> Architecture and Hardware
|
Architecture and Hardware
Note:
Whilst every effort is made to keep the syllabus and assessment records correct
for this course, the precise details must be checked with the lecturer(s).
| Code: | GC03 |
| Year: | MSc |
| Prerequisites: | This course should be taken in conjunction with the core courses for this programme (ie GC01, GC02, GC04 and GC05) |
| Term: | 1 |
| Taught By: | Peter Rounce (100%)
|
| Aims: | To "demystify" computers - i.e. to provide a basic understanding of how computers execute programs. To show how the basic components of the computer can be built from simple electronic components. |
| Learning Outcomes: | Students should understand the roles of the major components of a computer system, how instructions are executed, how memory is accessed and managed. They should appreciate the main performance measures and constraints. |
Content:
| Major components of a computer | Processor, storage, input and output. |
| Information representation | Digital and analogue representation. Bits and bytes. Number Systems: binary, hexadecimal, negative numbers. Fixed length arithmetic. Fractional numbers. |
| The processor and main memory | General and special purpose registers. The fetch-execute cycle. Instruction formats and encoding. Assembler instructions. The bus. |
| Introduction to the MIPS processor | Assembler syntax. Branches. The SPIM emulator |
| Data and Data Structures | Characters and Floating point. Static data structures: arrays. Dynamic data structures: queues, stacks and linked lists. |
| Stack Usage | Parameter passing. Return addresses. Stack Frames. |
| Input and Output | Basic I/O, streamed I/O, polling loops. The I/O interface and its role. |
| Interrupts | Generation, prioritisation, Interrupt Servicing and the ISR. |
| DMA (Direct Memory Access) | What it does, how it's done, when it is used. |
| Serial I/O systems | Asynchronous, synchronous, ethernet |
| Disk I/O | Magnetic storage, disk capacity, organisation and performance. |
| How the CPU works | Internal Structure and operation of a Mips-like CPU. |
| Real Memory | Commercial Memory: structure, operation. Cache memory. |
| Making it go faster | Pipelining. Instruction and data caches. RISC vs CISC. |
| Memory Mangement | How paging is implemented. |
| Basic Electrical Theory | Current, voltage, resistance. Conductors, Resistors. Power. Simple electrical circuits. |
| Logic Circuits | NOT, NAND and NOR circuits. |
| Semi-conductors | Diodes and transistors. The transistor as an electrical switch. Transistors in logic circuits. |
| Data storage in digital circuits | Flip-flops, Registers and memories. Memory configuration. Memory types; RAM and ROM. Accessing I/O interfaces. |
| CPU operation | Clock cycles, timing diagrams, Finite State Machines, Internal CPU Structure and operation. |
Method of Instruction:
Lectures and web-based exercises.
Assessment:
The course has the following assessment components:
- Coursework Section (1 piece, 10%)
- Written Examination (2.5 hours, 90%)
To pass this course, students must:
- Obtain an average of at least 50% when the coursework and exam components of a course are weighted together
The examination rubric is:
Answer question 1 (Section A) and TWO questions from Section B.Resources:
"The Architecture of Computer Hardware and Systems Software (3rd Edition)", Irv Englander, Wiley, 2003, ISBN 0-471-0732
"Computer Organization and Design (3rd Edition)", Patterson and Hennessy, Morgan Kaufmann, 1999, ISBN 1-55860-4910-X
"Structured Computer Organisation (4th Edition)", Tanenbaum, Prenctice-Hall. 1999, ISBM 0-13-020435-8
"Computer Organisation and Architecture", B.S. Chalk, Palgrave-Hall. 1996, ISBM 0-333-64551-0
Course web page
|
|
+44 (0)20 7679 7214 - Copyright © 1999-2007
UCL
