Various researchers consider evolvable hardware to encompass various marriages of artificial evolution and hardware synthesis and operation. I see any hardware system that uses an evolutionary algorithm to guide alterations to its architecture as evolvable hardware. To review current work and read about some case studies, see the book chapter "On Evolvable Hardware", which can be downloaded from my publications page.

One of the main problems for evolvable hardware, and to a large extent EC in general, is that the difficulty in finding a good solution explodes as the size of the problem increases. My main research interest is finding methods to increase the scalability of evolvable hardware techniques, through improving the evolvability of the systems, rather than using brute force.

Evolvability of an EC system can be improved by tuning the problem to the evolutionary algorithm, thereby making the fitness landscape more tractable to the algorithm, or tuning the algorithm operators to the problem, so the algorithm moves across the landscape in a smoother manner. A number of techniques have been identified to achieve these, although they have not necessarily been applied to evolvable hardware specifically. The most common alteration to the algorithm is modularisation.

Many problems can be divided into sub-problems, which can be solved separately. Human designers tend to work using the principle of ‘divide and conquer’, recursively modularising problems from the top down. Evolutionary algorithms work from the bottom up, according to the building block theory looking for small, highly fit parts of a problem, and recombining these to find better solutions. Modularisation techniques can be used to help the evolutionary algorithm in its quest, by identifying and fixing these building blocks so we no longer have to rely purely on schema theorem to do all the work.

Modularisation techniques can be divided into two categories – explicit and implicit. Explicit modularisation techniques expressly search for modules to define within a solution. Those that have been used with evolutionary algorithms to date include ADFs and module acquisition.

Implicit methods produce modularity indirectly. The most obvious of these is the use of embryogenies, which occurs in nature. Embryogenies, or growth processes, can produce remarkable amounts of modularity at various levels, from the cellular to organ-level. Embryogenies can also provide other useful features, such as genotype compression and recursion of phenotype structures.

In nature, many species evolve simultaneously. Interactions between evolving species (or other groupings) can occur either directly, or indirectly through the environment or a third party. How similar interactions between artificial species can affect artificial evolution is a current area of research. Most of the work to date has been directed at using co-evolution with directly competing species, thus generating ‘arms races’ between the species.

Recently, work has begun to look at mutualism, where species evolve to co-operate, rather than to compete. These sorts of interactions have been found useful in a number of areas, including modularisation through speciation, where the co-evolving species must interact to produce a final solution. Modularisation through mutualism could prove to be a fruitful aid to scalability.

The other approach to improving evolvability is to change the problem representation to make the fitness landscape more evolvable. One of the great advantages of evolvable hardware is that the evolutionary algorithm will make use of any features of the representation that it finds useful. Therefore if we allow the algorithm to see our hardware as more than just synchronous digital hardware, we will be introducing a lot more detail to the fitness landscape. This could provide intermediate points in the landscape, which may result in a ‘smoother’ and more evolvable landscape, so much so that the increase in problem search space is offset by the increase in pathways to good solutions. Evolving designs intrinsically in FPGA hardware can allow us to explore this, which no software-only evolutionary paradigm can.

To ensure robustness, we may want to find a synchronous digital solution, but this does not preclude the use of other more esoteric points on our climb to that solution. Precisely how the bias of digital/analogue and synchronous/asynchronous behaviour should be directed during runs to achieve this is an interesting area of research, as is the whole issue of whether intrinsic evolvable hardware can really help with scalability in this manner.

I am also interested in identifying applications that evolvable hardware is suitable for. As scalability is improved, more applications will become realistic. Applications that I am currently interested in are general data compression, encryption and error correction.